Research On Successive Approximation Analog To Digital Conversion IC Chips Based On 0.18μm Cmos Technology

With the rapid development of society,people’s demand for material life is constantly met,which makes people’s attention to health and medical problems also greatly increased.If people want to monitor their own health,they can only realize it through the medical monitoring equipment in hospital clinic.Because the traditional medical monitoring equipment is large in volume and power consumption,the cost is high.Long-term,real-time health monitoring is not possible.That’s where wearable medical devices come in.Its development is limited by the short battery life.The aim is to propose a response scheme for long-term real-time monitoring of human health.Compared with traditional medical devices,wearable medical devices can carry out longterm,real-time monitoring of human physiological conditions without affecting people’s basic living conditions.The essence of wearable medical device is to develop low power consumption and low cost micro integrated circuit system.As one of the main energy consumption circuits in wearable medical devices,analog digital converter can greatly improve the endurance of wearable medical devices by reducing power consumption.In this paper,the successive approximation analog-to-digital converter is used to design high performance and low power consumption analog-to-digital converter by virtue of its simple structure and high energy efficiency.The main work contents are as follows:(1)The reason of selecting successive approximation ADC as an important component of wearable medical device is described.Then it introduces the basic working principle of the traditional successive approximation ADC and its unique advantages over other ADC structures,and gives the overall architecture of the successive approximation ADC in this design.(2)The basic circuit structure of each component module in the successive approximation ADC is analyzed in detail.According to the principle of high performance and low power consumption,the structure and parameters of each module are optimized.The structure characteristics of common sampling switches and the factors affecting accuracy and speed are studied.The structure of the bootstrap sampling switch is improved,and the SFDR is more than 20 d B higher than that of the traditional bootstrap sampling switch.By deducing the switching energy consumption of different capacitor array digital-to-analog converters,the structural characteristics of high performance and low power DAC are summarized and the switching strategy of capacitor control is formulated.A piecewise and bit by bit split DAC capacitor array structure is selected.Comparator selection has two working states of dynamic comparator,using preamplification and latch structure.According to the characteristics of dynamic latch comparator and double wake comparator,a dynamic comparator suitable for low voltage and low power consumption is designed,and the error of the comparator circuit is reduced by the output mismatch memory technology.(3)For traditional SAR synchronous sequential control logic circuit,this paper adopts asynchronous sequential control logic circuit.According to the characteristics of the output results of the comparator,the clock signal is generated by logical comparison,which is used as the clock signal of the successive approximation module.This can effectively ensure the capacitor plate level switching after the DAC capacitor array plate voltage comparison is completed.Effectively avoid the phenomenon of switching between unfinished achievements.In this paper,SMIC 0.18μm CMOS 1P5 M technology is used for circuit simulation and layout design.The simulation results after extracting the parasitic parameters of the circuit show that when the power supply voltage is 0.8V and the sampling frequency is200KS/s,the design circuit can reach 11.35 significant bits,the power consumption is3.45μW,the quality factor is 5.7f J /con-step,and the overall layout area of the circuit is650μm×370μm.Simulation results show that the ADC structure is suitable for high performance and low power wearable medical devices.