Design Of A 12-bit Successive Approximation Analog-to-Digital Converter

In the front and the end of the advanced electronics systems, analog to digital converters (A/D converters) are applied to improve the performance of the digital processing technique. Of all kinds of A/D converters, successive approximation (SAR) A/D converters are frequently the architecture of choice for medium-to-high-resolution applications with sample rates under 5 mega samples per second (Msps). Because of providing low power consumption as well as a small form factor, SAR A/D converters have a wide variety of applications, such as portable/battery-powered instrument, pen digitizers, industrial controls and data/signal acquisition. A 12-bit high speed, low power, SAR A/D converter is designed, which operates from a signal 2.7 V to 5.25 V power supply and features throughput rates up 1Msps. Performances of digital-analog (D/A) converters and comparators have a very deep influence on SAR A/D converters, so the research of the two parts' design is focused on. If they can have good performances, SAR A/D converters can work well. A charge scaling D/A converter with capacitor voltage divider is designed, which extends the resolution of a parallel D/A converter as well as reduces the chip area greatly. For the design of comparator, the architecture of low-gain and high-bandwidth preamplifiers followed by a dynamic latch is employed, which satisfies the requirement of high speed and reduces the power consumption. For the design of high resolution A/D converters, the design of the sample and hold circuit is very important. Here the bottom plate technique is employed, which can cancel the charge injection error. The simulation shows that the high speed comparator and the D/A converter meet the requirements of the 12-bit A/D converter, and the SAR A/D converter can work well.