Design And Research Of Nanoscale CMOS Latch Against Multiple-node Upset

When high-energy particles from space radiation(such as: high-energy protons and high energy heavy ion)on semiconductor devices,will produce certain charge under the ionization effect,the steady accumulation of these charge in the sensitive parts of the semiconductor device to device logic state changes,in turn,the normal operation of the device,this phenomenon is called the single particle flip effect.In addition,with the acceleration of the development of integrated circuits,the size of devices becomes increasingly smaller and the critical charge value decreases continuously,which makes devices more sensitive to singleparticle flipping.At the same time,the scale and complexity of aerospace systems are increasing,which makes the devices with high integration degree used more frequently in aerospace systems.Among them,the single particle inversion caused by space radiation is more harmful to the devices with data storage and command operation functions,which will seriously affect the normal work of the devices and thus cause a fatal threat to the space system.Therefore,it has become a major technical problem for researchers to strengthen the device with storage function.Multiple-node upsets(MNUs)caused by charge sharing effects are dramatically increasing in advanced nanoscale digital latches.Consequently,the robust latches against MNU cases are increasingly important.Although some existing robust latches are designed to recover MNU cases,they incur significant hardware redundancy and more sensitive nodes due to only depending on multiple circuit instances(e.g.,C-elements(CEs)).In order to obtain a balance between high tolerance capability and low overheads,in this paper,we propose a novel radiation hardened latch(RHL)based on the polarity of the radiation-induced voltage pulse(positive or negative pulse).The proposed latch is capable of tolerating any possible single node upset(SNU)and MNU cases in all considered nodes while manifesting fewer transistors and sensitive nodes.In this paper,the mechanism of node flipping caused by single particle effect is introduced in detail,including single-node upsets(SNU)mechanism and MNU flipping mechanism.Secondly,the existing reinforcement schemes of anti-node overturn latch are elaborated one by one,and the shortcomings and disadvantages of its circuit structure are clarified.Finally based on the existing research situation puts forward new reinforced latch structure,and in 65 nm TSMC timing simulation and reliability analysis under CMOS process,verify the structure shows that the proposed new latch can not only resist any form of node,and its power consumption,latency,and area of performance compared with the existing latch are performed well.