Font Size: a A A

Research On Test Pattern Generation In Presence Of Unknown Values

Posted on:2021-03-10Degree:MasterType:Thesis
Country:ChinaCandidate:J F YingFull Text:PDF
GTID:2428330614460230Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With ever increasing complexities and a component-based design style there is a growing number of unknown bits occur in different phases of the design and production process.The propagation of X-value will seriously affects test quality.On the one hand,the existence of X-value decreases the test coverage of test sets.On the other hand,The propagation of X-value brings a great challenge to test response compaction.In order to solve these problems caused by the X-value,The thesis conducts research on the actual effect of X-value and ATPG algorithm on X-value circuit.The contributions of the thesis include:(1)The thesis presents a method to predict X-sensitivity of single circuit input on test coverage.The method combines the machine learning with the existing X-value problem,and analyzes the actual effect of X-value by reasonably modeling the circuit.Firstly,the basic structure parameters of the circuit are calculated by topology algorithm.Then the circuit is divided into three parts,and the specific circuit characteristic parameters are extracted as the original data set.Finally,the random forest model is used to train and predict the datasets obtained in all circuits.Compared with the existing prediction methods,the test set accuracy of this method is 90.27%and 14.69%higher.and the accuracy of large circuits is 93.32%and 19.49%higher.(2)The thesis presents a prediction method of test coverage loss under multi-inputs with unknown bits.Considering the fact that there are more than one X-value in the circuit,the method revises the single X-input prediction model by the idea of equivalent substitution.The method supposes that the multiple X-inputs can be obtained by the fan-out of single point X-input.And then the features of single X-input prediction model are corrected.Finally,the original data set consists of a random sample of multiple X-inputs cases in all circuits.Compared with the existing prediction methods,the average prediction accuracy of the proposed method is 94.47%and 21.72%higher.The minimum prediction result of a single circuit is 89.03%,and the maximum value is 99.99%.(3)The thesis presents a X-value ATPG algorithm base on ORSL encoding.Firstly,a machine learning model is established to analyze the influence of X-value,and partly eliminates X-value in the circuit.Then in the coding preprocessing stage,a concept of regrouping coefficient is presented to further reduce the encoding work of X-value in the circuit,and deeply reduce running time.The experimental results show that the test coverage of all circuits is more than 90%,and the proposed method can keep a high-test coverage when the X-value ratio is high.Compare with the QBF-ATPG algorithm,the proposed method can reduce the running time by tens of times with the decrease of coverage of neglect.Compare with the RSL-ATPG algorithm,the proposed method can achieve a run time drop of nearly 40%while maintaining the same test coverage.
Keywords/Search Tags:VLSI test, X-value, machine learning, ATPG, test time
PDF Full Text Request
Related items