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Analysis And Optimization Of Clock Tree Of CPU Based On The Flexible H-tree

Posted on:2019-07-04Degree:MasterType:Thesis
Country:ChinaCandidate:J X WuFull Text:PDF
GTID:2428330572957772Subject:Engineering
Abstract/Summary:PDF Full Text Request
The clock signal is usually the highest frequency in chips,the longest interconnect and the largest load,and it is the benchmark for the normal operation of the circuit.The clock signal must ensure that most critical path can also meet the timing requirements even the chip is in the worst environment.Otherwise,the timing will not be convergent,and the timing disorder may lead to the failure of the chip to work properly.The traditional CTS(Clock Tree Synthesis)is becoming more and more difficult to meet the requirement of the clock signal with the continuous reduction of the size of the IC process and the increase of the scale.Therefore,many implementations of clock tree top-level structure have been discovered and applied to chip design.H tree is one of the most commonly used structures.At present,the H tree structure is widely used in VLSI to solve the problems of the driving capability and the balance of skew group,and to maximize the timing convergence.This structure is also supported by major EDA tools manufacturers.The Flexible H-tree is the realization method and optimization scheme of H tree structure of Cadence's digital backend physical design EDA tool INNOVUS.It can make the distribution of tap points more flexible on the basis of the H tree structure,thus maximizing the advantages of the H tree structure,and thus better and faster implementation of CTS.Through the Flexible H-tree,the top-level design of CPU clock tree can be completed,which can better meet the stringent timing requirements of CPU.The CPU can still work steadily under the higher main frequency.By comparing traditional CTS and CTS based on Flexible H-tree,this paper studies the benefits of Flexible H-tree in VLSI,especially CPU.On the basis of relevant research at home and abroad,this paper takes a high performance CPU clock tree structure and its design as the research object on the basis of 40 nm technology,and combines the back end physical design process of the chip,and deeply studies the Flexible H-tree.First of all,the reason why traditional CTS can not meet the timing convergence is analyzed.It is found that we need to reduce the clock bias to solve the problem of timing convergence.Then,the feasibility of solving the clock skew and timing convergence problem of Flexible H-tree is theoretically analyzed.Then the Flexible H-tree CTS of Falcon_cpu is completed,and it is optimized from the angle of the winding rule of the top clock signal line,the distribution of the Flexible H-tree tap points and the driving distance of the gate control clock.Finally,by comparing the results of the traditional CTS and the Flexible H-tree CTS,it is found that the top layer design of the clock tree can reduce the clock error by 65.7%,and finally solves the problem of the timing convergence which can not be solved by the traditional CTS.It proves that the Flexible H-tree plays a positive role in the CTS optimization of Falcon_cpu.
Keywords/Search Tags:Physical Design, VLSI, Clock Tree Synthesis, H tree, One Chip Variation
PDF Full Text Request
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