Based On The MIPI Protocol TFT-LCD Driver IC Design And Research

With the popularity of smart mobile handheld devices,more and more electronic products are beginning to use TFT-LCD display screens,but with the increasing size of screen displays,increasing resolution and the increasing market demand brings big challenge to TFT-LCD driver IC.The display interface in the conventional TFT-LCD driver IC can no longer meet the requirements of high-resolution images and high-speed data transmission.Based on the MIPI protocol standard developed by the MIPI Alliance,this paper studies and designs a high-speed data serial interface for TFT-LCD display screens.Compared with the traditional display interface,the data transmission rate has been significantly improved,also reduce the power consumption greatly.This thesis firstly analyzes and researches the display and driving principle of TFT-LCD in detail.Then,through the mastery and understanding of the MIPI protocol,the system-level module architecture design of the data interface part of the TFT-LCD driver IC is carried out.According to the data interface transmission requirements,three different operating modes are set,namely,an ultra-low power mode,a low-speed transmission mode,and a high-speed transmission mode.During the operation of the interface circuit,these three different modes switch back and forth.Improves transmission efficiency and significantly reduces power consumption.The system-level functional framework designed in this paper can be divided into four levels,namely the physical transport layer,the channel management layer,the underlying protocol layer,and the application layer.The physical transmission layer includes the analog circuit logic and the digital circuit logic,the main function is to receive the high-speed data of the interface circuit and send or receive low-speed data.This article deals with the clock channel control and the data channel control of the digital circuit with detailed design and description.By using the finite state machine,the channel complete the transition between different states;Channel management module mainly put the data on each data channel in accordance with the provisions of the agreement for the fusion processing,while using high speed and low speed separate processing method,designing the clock switching circuit;The main function of the underlying protocol layer is to identify the format and content of the transmitted data packet,and to decode or encode thedata packet,and add the corresponding ECC code and CRC code according to the format of the data packet,by which guarantees the accuracy of the transmission;The application layer module part is used to convert the control instructions or image display data transmitted in the previous layer into the DBI format or the DPI format,output to the display module.This part can also read the display module according to the related instructions.With the corresponding instructions,this information can be transmitted back to the host.The entire design of this paper uses Verilog HDL hardware description language to compile RTL-level code,using VCS software for functional simulation,using Verdi software to check the simulation waveform and code optimization.The process library uses Taiwan Powerchip's 0.11?m process.The report obtained through DC synthesis shows that the overall area of the interface circuit is 87796.800065?m2 and the power consumption is 2.8353 mw,all of the result meets the technical requirements of the design.Finally,the MIPI-DSI interface circuit of the driver IC was tested by using instruments.The maximum transmission rate of a single data channel was 814.6Mbps,which was basically consistent with the original design intention.