The Backend Digital Block Of USB3.0 Research And Implementation

At present,with the chip function more powerful,the integration is getting higher and higher.In order to accelerate the design,reducing the design cycle,integrated common IP(Intellectual Property)is a mainstream design method now.As the USB(Universal Serial Bus)technology is widely used,integrated USB function in the SoC(System on Chip)is also inevitable trend.To integrate USB3.0 IP as the research object,this thesis intends carry out the relevant back-end design and related experimental research as follows:(1)Based on USB 3.0IP,this thesis studies the digital back-end design method and determines the final back-end design scheme;(2)To integrate USB 3.0 IP in SoC,this thesis research the low power design method,and select the appropriate method applied in the actual design;(3)To integrate USB 3.0 IP in SoC,this thesis research the floorplan and power plan strategy;by optimizing the chip floorplan,to optimize the chip timing,winding resources,reduce the chip area;optimize the power plan strategy to reduce the power line voltage drop,power consumption;(4)To integrate USB 3.0 IP in SoC,this thesis study the Clock Tree Synthesis method so that the SoC can decrease the clock tree delay,the clock tree skew,the impact on timing;(5)To integrate USB 3.0 IP in SoC,we do the verification of back-end design and the test of USB function.We make sure the correctness of SoC by doing the verification of back-end design and the test of function.In this thesis,we have verified the feasibility of a variety of low-power design methods,finished the actual project,test the correction of the project.