Algorithm Research And FPGA Design And Implementation Of Turbo Encoder And Decoder

Turbo-Code, with the perfect performance near Shannon limit, plays an important role in wireless communications and becomes one of the hottest issues of recently theoretical research of error-correcting codes. In today's information age, with the continuous improvement of people's living quality. The improvement of communication tools and technology is getting more and more interested in users. Now, with the appearance of 4G, people can enjoy the fast speed and high performance as the result of communication engineer's constant research for communication protocols, algorithms and so on. Among them, Turbo Code as channel encoding technology is getting improvement and innovation in communication system constantly.First, this paper studies the structures of Turbo Encoder and Decoder. And at the same time introduces the implement principle of every module of Turbo Encoder and Decoder. This paper analysis of the two important issues of component for encoder and interleaver. To decoder module, this paper compares two kinds of turbo decoding algorithm(SOVA and MAP) and elaborates algorithmic principles of MAP. At the same time, the paper analyses MAP decoder's performance on the figures of code rate, length of interleaver and the number of iteration.In this paper, the algorithm is improved form two points. The first on the one hand, the algorithm only analysis two road signal, in this paper considers multi-channel signals and makes analysis of the algorithm which is optimized and approximate. On the other hand, due to the ignorant of correction function in MAX-Log-MAP algorithm, in this paper, algorithm is considering the effect function instead by linear fitting, and at the same time, instead of external information by multiplying by scaling factor. And by using MATLAB tool, the simulation result proves that this new algorithm improves the decoding performance from different angles at the cost of increasing bits of complexity.In the implementation of FPGA, with the help of ISE12.2 software from XILINX, this paper implements the design of every module of Turbo encoder and decoder with 1/3 rate and 7 bits quantitative width by using the hardware language(Verilog HDL). In the structure of encoder, mainly completes RSC, interleaver, string-to-parallel and parallel-to-string conversion and introduces the implementation of one-third of the frequency. On the channel side, in fact the signals always get disturbed by noise. In order to simulator the real communication process, the disperse AWGN channel is simulated with the help of MATLAB. Then in the structure of decoder, A turbo decoder based on MAX-Log-MAP and new suggested algorithm is implemented by two decoder alternately. And this paper make analysis and verification about the algorithm based on the result of simulation.Now, based on the widely application and analysis of Turbo Code, the algorithm and structure is improving continuously. Turbo code has become the most efficient coding technique in communication system.