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The Research Of Clock Tree Synthesis Technology Based On TheGuide

Posted on:2015-03-03Degree:MasterType:Thesis
Country:ChinaCandidate:Y L WangFull Text:PDF
GTID:2268330428964690Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
In the digital integrated circuits, the clock signal which acts as the reference of the design timing plays an important role for the performance and stability of the chip.The clock tree synthesis is the process of implementing the clock propagating network and it’s an significant part within the chip physical implementation flow.The quality of the clock tree synthesis is not only an key factor to the performance of the design, but also it affects the design period greatly. In other words, a high quality clock tree can decrease the number of timing violation paths effectively, thereforce speeding up the timig closure and design sign off.This paper gives a brief introduction to the bases of the clock signal and clock tree firstly.And then, the advantages and shortcomings of various clock structures are analyzed,including the key to realize a high performance clock tree.Based on above analysis,we implement a low clock skew tree which can speed up timing closure effectively and it’s called Hybrid tree.The platform is TheGuide and this is a kind of chip physical design tool.The basic structure of Hybrid tree is the commonly used balanced buffer tree.By adding the SCB(Structured Clock Buffer) cell as the driven cell to the root of the clock, the length of clock common path is increased. So,the Hybird tree can decrease the OCV(On Chip Variation) effect to the clock skew.The Hybrid tree is implemented by combining manual method with tool’s automation and the detail process is the key part of this paper. According to the result of the experiment, the skew of Hybrid tree is improved by40%nearly compared with the traditional tree that is synthesized by the tool automatically.The number of setup violation paths is showed46%decrement and35%for the hold violation path number.Meanwhile, the clock slew and clock tree power sumpation is almost same as the traditional tree.Besides,the theory of static timing analysis is also discussed in detail, especially about the OCV and CPPR(Common Path Pessimisim Removal).In order to facilitate the understanding of various concepts, some example within Encounter and IC Complier platform are also introduced.
Keywords/Search Tags:Clock Tree Synthesis, Clock skew, OCV, Static TimingAnalysis
PDF Full Text Request
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