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Research And Implement Of The Clock System On X Microprocessor

Posted on:2006-02-26Degree:MasterType:Thesis
Country:ChinaCandidate:J LiuFull Text:PDF
GTID:2168360155972114Subject:Software engineering
Abstract/Summary:PDF Full Text Request
With the development of microelectronics, the high-performance processors are made in 0.13um process widely, and its clock frequency is above 3GHz, which make the design and optimize of the clock system is becoming important. However, unlike most CMOS digital circuits mat migrate well into new processes, clock designs get harder with each generation. The clock on a new microprocessor might have to drive more than twice higher loads than the previous generation. So, simply scaling the clock driver sizes and expanding the clock distribution network does not work in practice. Thus, it is very important that the clock system study and development technology.When designing a synchronous digital system, the clock distribution networks synchronize the flow of data signals among the data paths and control paths. The design of clock networks can dramatically affect the performance and reliability of the system. The optimization goal of the clock distribution networks is to reduce the clock skew. Another goal is to improve clock signals' quality. In order to improve the system performance, researches are focus on how to .make use of useful clock skew.This paper combines with the requirement of practical engineering tasks. The research field of this paper relates to the following topics:· the design and optimize technology of clock distribution network;· the analysis and modeling of the timing characteristics of clock distribution networks;· the scheduling of the optimal timing characteristics of clock distribution networks based on architectural and functional performance requirements;· the supplement technology of clock skew.According to the requirement of practical engineering tasks, "X high performance CPU research and development", we design the high performance clock distribution network, and discuss the special electric circuits that can be used in this chip's clock distribution network.In this paper, the design and optimize technology of clock distribution network and the supplement technology of clock skew are partly applied in the practical engineering design task, specially the supplement technology of clock skew is in favor of improvement of optimize technology of clock distribution network of higher performance CPU.
Keywords/Search Tags:Clock distribution network, clock tree, clock skew, clock skew schedule, CMOS, H-tree, Interconnect Delay, process variations, RLC impedances, synchronization, Timing Optimization
PDF Full Text Request
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