Research On Back-end Design And Implementation Of32-bit CPU Dual Interface IC Card Based On SOC Encounter

Dual-interface card with32-bit CPU is a smart IC card that has both contact and contactless communication ports. Because of its high security, stability of data transference, storage capacity and so on, it is used in various field of industry with very bright future.This paper is about back-end design for smart IC card chip with dual interface based on32-bit CPU. Firstly, the basic design principles of the dual interface32-bit CPU card and the flattening type of the back-end design flow are introduced. Then the layout and verification process of the high-end, dual interface card chip with32-bit CPU is discussed in detail based on the relevant key technologies of the placement and routing, such as the floorplan, power plan, place, CTS, parasitic extraction and static timing analysis and so on. SOC Encounter from Cadence is a excellent tool used to place and route. Finally the layout integration and physical verification of the chip after completing placement and routing of the chip are elaborated to ensure the accuracy of GDSII date for the fab. In this process, Virtuoso is used to edit the layout and Calibre from Mentor is used to do physical verification.In this paper, the back-end design of the dual-interface card with32-bit CPU is completed. This project uses0.18μm process flow and the chip’s basic information is as follows:the working voltage is1.8V and3.3V. The chip’s max width is3.7mm and the max length is6.5mm.The area of the chip is not less than20mm2. The simulation result of the average power consumption is about between12mW and13mW. The operating frequency is between13.553MHz and13.567MHz. Above all, all the data listed meet the requirements of the design specification.