Research And Design Of Digital - To - Analog Converter In UHF Radio Frequency Identification Reader

The monolithic integrated ultra-high frequency (UHF) radio frequency identification (RFID) reader for portable applications has received extensive attention recently. Digital-to-analog converter (DAC) is an important circuit module in the reader chip, and greatly affects the performance of the whole system. In order to meet the spectrum mask requirements, a DAC needs to have a good dynamic performance, for example, high spurious free dynamic range (SFDR). Besides, to meet the demands of lower cost and longer battery life in portable devices, the power and the area of chip needs to be optimized.This work presents the design of a DAC for the UHF RFID reader chip, including system analysis, architecture selection, circuit design and measurement. The main contributions of this thesis are listed as follows:1) The design specification of DAC is calculated based on the analysis of the system requirements. By comparing the characteristics of different architectures, current-steering DAC is chosen as the final solution.2) Non-idealities of the current-steering DAC in actual circuits is analyzed. The influence of current source mismatch to DAC dynamic performance is given.3) Dynamic element matching (DEM) is adopted to decrease the matching requirement of the current sources. Segmented randomized thermometer coding is introduced as a low cost DEM implementation.4) The total area of DAC is optimized by calculating area contributions of each module.A10-bit current steering DAC is implemented based on the proposed segmented randomized thermometer coding. The chip is implemented using SMIC0.13um CMOS process. The measured results show that both Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) are lower than0.6LSB, and SFDR reaches80dBc at low frequency. Each channel of the proposed DAC occupies less than0.05mm2and consumes less than3mW from1.2V digital/analog supply.