Low-voltage Low-power 12-bit Current-steering Dac Design And Research

Digital-to-Analog Converters (DACs) are essential modules that are widely applied to digital signal processing, including modern image processing, wire and wireless communication, etc.Nowadays, high accuracy and high speed are of most importance to applications of DACs. To meet the requirements of high speed and high accuracy, a novel current-steering DAC was proposed in this thesis. Due to its current-mode architecture, the DAC has high drive capability and frequency response better than the voltage-mode ones.In system design, a 12-bit DAC is based on current steering architecture was adopted. In comparison with other kinds of current-mode DACs such as R-2R DACs, it provided better static characteristics with the good matching among current source array and higher output impedance. Based on study and analysis of lots of mainstream 12-bit current-steering DACs, including their typical structures, current calibration and decode methods as well as the layout placement, the SPEC, (specifications) of the DAC were proposed. And according to the SPEC, its architecture and key modules were designed and optimized.The current-steering DAC can be implemented by either binary-weighted or thermometer-coded architecture. To target an optimum architecture a compromise is made in segmented architecture.In system design, by analyzing the three common architectures of the current-steering DACs, a segmented current-steering architectures was choosen to combine the advantages of the thermometer-code and binary-weighted ones, which consists of 7 thermometer-coded bits and 5 binary-weighted bits.The DAC was constituted by a current reference module, a current source array and a current switch array. Current reference module provides a minimum current reference and current source array mirrors this reference to multiplecurrent sources under control of current switch array.The system and key module design were discussed in details, as well as the floorplan and routing. The power supply voltage of the DAC is 1. 8V. To achieve low power consumption, some low-power design techniques were employed. To meet the demands of applications in system-on-a-chip (SOC), the circuit is designed in 0. 25 u m CMOS digital process, which is compitable with a 8-bit MCU, instead of bipolar process.