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Study On Core Module Circuits Of 10 Bit 1GSample/s Digital-to-Analog Converter

Posted on:2011-11-30Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z MaFull Text:PDF
GTID:2178360302991618Subject:Software engineering
Abstract/Summary:PDF Full Text Request
The design of core module of 10 bit 1GSample/S Digital-to-Analog Converter is discussed in this paper in detail. After studied the basic principles and structures, the segmented architecture of current-steering DAC is adopted. The 8 MSBS are thermometer code weighed and the 2 LSBS are binary-weighted. The specific circuits of core module in the 10 bit 1GSample/S current-steering DAC is designed , such as current mirror circuit,switch array circuit,non-overlapping clock circuit,VGS swing-decreased circuit. The structure of current-steering can markedly reduce the area and power of the chip. The all circuits of DAC have been simulated in TSMC 0.25μm NMOS standard process model by HSPICE. The simulation results meet the requirements of the design of DAC mentioned in this paper. The INL and DNL of the DAC chip are -0.5~+0.5LSB,-1~+1LSB,respectively. It is helpful to design High-Performance DAC using new semiconductor process.
Keywords/Search Tags:Digital-Analog Converter, Current-steering, Current mirror, Switch array, NMOS standard process model
PDF Full Text Request
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