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Design Of A12-bit,200-MHz Current-steering D/A Converter

Posted on:2016-04-29Degree:MasterType:Thesis
Country:ChinaCandidate:T S WangFull Text:PDF
GTID:2298330467493497Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
DAC (Digital-to Analog Converter) is an important interface of digital and analog circuit. With the rapid ascension of digital technology, the speed of digital signal processing is keep getting faster. It’s an urgent need to improve the speed and the precision of the DAC.This paper studies the basic principle and the basic structure of DAC, and then analyzes the advantages and disadvantages of each structure. Based on the method of all custom, from top to bottom, we design a DAC which is12bit,200MHz. The DAC in this article mainly includes register, decoding circuit, limiter circuit, current source, switch array and bias circuit. This paper mainly introduces the band-gap of the bias circuit, switching circuit from voltage to current and the operational amplifier. The result of temperature coefficient and the power supply rejection ratio of the band-gap showed as well. The analysis of gain, phase and bandwidth of the operational is done. The mismatch of current source will influence the SFDR of DAC and this paper analysis it. We design a limiter circuit which controlled by a switching signal, and then analyze the principle to reduce the effect of clock feed-through. This paper also analyzes the layout of the source array which is controlled by the high six. We also design a gate circuit controlled by the thermometer code which is belonged to the decoding circuit.Based on SMIC0.18μm CMOS technology, a12bit200MHz current-steering digital-to-analog convert with power supply voltage of3.3V and bias current of20mA was designed, which adopted binary code and thermometer code to decode digital singal. In this D/A converter, a PMOS cascode current source with high output impedance under high requency was employed to ensure that the circuit has good SFDR. Q2Random Walk MSB layout was employed to minimize the error caused by layout and placement. Simulation results showed that the D/A converter had an SFDR up to77dB at an input signal frequency of0.999876MHz and a sampling frequency of200MHz.
Keywords/Search Tags:segmented current-steering, digital-to-analog converter, cascodecurrent source, Spurious-Free Dynamic Range
PDF Full Text Request
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