Design Of A 12-bit 500MS/s Segment Current-steering Digital-to-Analog Converter

Wireless communication technology brings a lot of convenience to modern life.In this technology,the wireless transceiver system is the core module,and the digital-to-analog converter(DAC)is the bottleneck of the performance of the wireless transceiver system.At present,the mainstream DAC is a segmented current rudder DAC.The main decoding types in the traditional segmented current steering DAC are temperature code and binary code.Although the circuit implemented by the temperature code controlled current source switch has high accuracy,The transmission speed of the code circuit is slow,the power consumption is large,and the complexity is high,which causes the performance of the DAC to be affected.Although the circuit implemented by the current source switch controlled by the binary code has a great advantage in speed,its linearity is poor.Based on the above background,this paper focuses on the decoding circuit and designs a 12-bit 500MS/s segmented current steering DAC.Aiming at the shortcomings of the traditional thermometer decoding circuit,a new thermometer decoding circuit was proposed by summarizing the laws of the truth table.Its area,speed and power consumption were better than the traditional structure.In view of the linearity difference of the binary code current rudder DAC and the high complexity of the decoding circuit of the temperature code current steering DAC,a new type of decoding method-split decoding is introduced,compared to binary code and temperature code control.The current source switching circuit and the current source switching circuit controlled by the split code circuit have a good linearity and are relatively simple,so that the entire structure has a better adjustment and improvement.In order to overcome the shortcomings of traditional segmented current rudders,the new proposed decoding method is added to the design of the current steering DAC.The segmentation method is 3+5+4,that is,the high 3 bits are decoded by the temperature code and the middle 5 bits.Using split decoding,the remaining 4 bits use digital binary code,giving full play to their respective decoding advantages.In order to improve the nonlinearity of the circuit,the current source switch adopts the differential output mode,which can suppress the common mode interference compared to the single-ended output;in order to reduce the parasitic capacitance of the output node of the current source and improve the dynamic performance of the circuit,the current source array layout of this article is used.Adopt the sequential layout method.The segmented current steering DAC designed in this paper is designed using a0.18?m CMOS process.When the analog supply voltage is 1.8V and the digital supply voltage is 1.2V,when the sampling rate is 500MS/s,the simulation results show that the DNL is 0.30 LSB,the INL is 0.26 LSB,and the effective bit of the DAC when the input signal is 6.35 MHz.The effective number of bits(ENOB)is 11.7bit,the spurious-freedynamic range(SFDR)is 90.94 dB,the input signal is 239.74 MHz,the ENOB is 11.30 bit,the SFDR is 77.46dB;The test result shows that DNL is 0.28 LSB and INL is 1.16 LSB.When the input signal is 6.35 MHz,ENOB is 9.70 bit,SFDR is 68.83 dB,when the input signal is 239.74 MHz,ENOB is 9.50 bit,and SFDR is 62.06 dB.The entire DAC consumes17.20 mW and the Figure of Merit(FOM)is 119GHz/mW,making it ideal for use in wireless transceiver systems.