High-speed Optical Burst-mode Synchronization Circuit Simulation Study

In recent years, with the rapid development of modern communications technology, passive optical network(PON)as a solution of fiber access networks is increasingly favored. It has been widely used in many fields. And as the science and technology develops, the low-speed PON access technology early used has been unable to meet the demands of today. The next generation of PON transmission rate will be 10Gbit/s or even higher.Because the upstream transmission is TDMA system, the data transmission from different Optical Network Units(ONU) to Optical Line Terminal(OLT) is delivered in different time. So when the signals arrive the OLT, they are of different delay and power. The reaserch focus of the upstream transmission is the technology of receiver and synchronization in burst-mode optical communication.In this dissertation, numbers of technology of synchronization in burst-mode optical communication are analyzed and compared with each other. Then, two improved burst-mode clock-and-data-recovery circuits are introduced. One is a digital BMCDR circuit using oversampling. It is modified from conventional oversampling BMCDR. In this case, the critical path is shorted, a higher-speed and low-power BMCDR circuit is obtained. Besides the former circuit, a burst-mode CDR which is based on the gated voltage-controlled oscillator(GVCO) is presented. Compared with the traditional GVCO burst-mode circuit, a new GVCO is presented. It is composed of two LC delay stages and a data-triggering multiplexer. Whenever the input data is high or low, no oscillator is stopped during the normal operation. It will significantly reduce the data-dependent jitter. Two of the presented circuits are simulated in the dissertation. The simulation results show that these two BMCDR circuit can recover the clock an data correctly in burst-mode transmission.