The Research Of MDAC In High Performance Pipeline ADC

MDAC(Multiplying Digital-to-Analog Converter) is one of the most important blocks in high performance pipeline ADC. It plays a pivotal role in the accuracy and speed of the whole ADC. As the development of the research in high performance pipeline ADC, the research and design of high performance MDAC has become a hot topic. Based on 1.8V power, Chartered 0.18μm CMOS library, the paper has designed a MDAC applied in the first stage in a 14bit, 100MSPS pipeline ADC.The first point in the paper is the importance of MDAC in pipeline ADC as well as the analysis of principle and the origin of the error in MDAC, which is the cornerstone of the later design. Focusing on speed, we build mathematic model of set up time of OTA in MDAC. Centering in accuracy, we analysis some main non-ideal elements such as the limited gain, the non-linear of resistance in sample switch, the charge injection, the clock feedthrough and the mismatch of capacity of switch. Also we put forward methods in eliminating and reducing errors. Considering the power, speed and accuracy, we define the effective bits in the first stage in 14bit ADC as 3 bits. Then, according to the analysis above, we define the structure of MDAC and the target of OTA as well as the design of OTA, CMFB, gain-boost switch. The emphasis is the design of two-stage OTA and CMFB aiming at reaching the demand of high gain, high bandwidth. At last, we finish the design and verification of layout of MDAC in the first stage in ADC.We stimulate and verify the circuit in Cadence Spectre. The result shows that the set up time is 2.91ns when 100MHZ sample frequency, 12bit accuracy signal are added. When 8192 FFT is applied to 47MHZ input signal, the SFDR of MDAC is 83.47dB.