MDAC Circuits Design For Pipeline ADC

Pipeline Analog-to-Digital Converter (ADC) is widely used in high-speed andhigh-resolution applications because of its superior trade off among speed, area andpower. Multiplying digital-to-analog converter (MDAC) circuits are key functionalblocks in pipeline ADC. The thesis studied the MDAC circuits of pipeline ADC. Basedon SMIC0.35μm3.3v CMOS process, a5-bit1st MDAC is designed. The MDAC canbe applied in a16-bit100MHz pipeline ADC.Based on discussing the structure of MDAC circuits, the circuits of the MDAC aredesigned. The circuits design covers: CMOS fully differential oprational amplifier (OPA)with switched-capacitor common mode feedback (CMFB), bootstrapped switch, etc.Simulation has been done to clarify the circuit performance. Simulation result showsthat the DC gain of the OPA is96.49dB, the gain bandwidth is2.3GHz and the phasemargin is55°. When the input signal is9.997558594MHz and the sampling clock is100MHz, the SNDR and SFDR of the output signal is respectively about87.05dB and95.56dB, which achieves14-bit accuracy and meets the requirement of the system.