Back-end Design And Verification Of GPS System Chip

The GPS system chip is an equipment used for location and navigation round-the clock, and it is designed based on GPS basic theory. Resent years, the well-known and important electronic products including GPS system chips have been used in many fields with the fast development of integrated circuit. The backend design of IC can influence its performance,cost,power consumption and succeed of tape-out, so the backend design of GPS system chip is very important. In this thesis, the CVE software of Onespin company,Blast Busion of Magma company,Calibre of Mentor Graphics company are used to introduce the backend design and verification of GPS system chip. The main contribution of this thesis is as follows:1. Bottom-up design method based on logic synthesis theory and the synthesis constrain are used for completing the logic synthesis of this chip, the Design Compiler software of Synopsys company is used. The equivalent verification is done by the CVE tool of Onespin company.2. Use the Blast Fusion tool of Magma to complete the floorplan,power design,multi-power domains and clock tree synthesis based on the demands of the chip layout design.3. Use the Calibre software of Mentor Graphics to do the layout verification of this chip. Analysis and solve all the problems which appear in this process, and it ensures the tape-out succefully.This chip was tape-out successfully in June 2008, now it is being tested and developed more.