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NOR Flash Design Based On A New SONOS Architecture Cell

Posted on:2009-08-17Degree:MasterType:Thesis
Country:ChinaCandidate:Y YuFull Text:PDF
GTID:2178360275470697Subject:Memory design
Abstract/Summary:PDF Full Text Request
For the progress of Flash Memory design technology, the grown up of Flash Memory product, the competition of Flash Memory market, the Flash Memory design will access to higher performance, higher density, larger capacitor, lower power consumption, lower cost. NAND Type Flash Memory is porpular for the low cost per bit, while multi-level technology makes lower cost of one bit. SONOS cell also can realize 2bit/cell storage based on new physical architecture and process, and be paid attention to by many foundries as a new and prospected technology.Study the architecture and mechanism of SONOS cesll and 2bit/cell Flash Memory design based on SONOS cell become a pop range. To make this cell more suitable for the progress of process, and keep the compatibility in smaller size device, 3S Company in TaiWan bring forward a new SONOS cell. As a test to design a nor type flash memory based on this SONOS cell, we will base on this design to introduce the architecture and character of this SONOS cell, the operation condition, and nor type flash memory design method in this paper.We first introduce flash memory status and the trend, then introduce this new cell architecture, operate mode, and operation condition especially how to realize 2bit/cell. We also introduce the main design method and the method to deal with some problems. At the end, we introduce the layout design and test plan. During design, we find some shortage of this cell when design nor typ flash memory, and we'll progress in next design.
Keywords/Search Tags:flash memory, read, program, erase, control gate, threshold voltage (Vt)
PDF Full Text Request
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