The Test Data Compression Of System-on-a-Chip (SoC) Based On Dimidiate Partition And Packet-sharing

For the rapid increasing of the complexity VLSI, the test of VLSI circuit becomes more important. As a great many of IP cores are integrated in the SoC, the test data are increasing rapidly. For the limit of test channel width and a large number of test data, more expensive ATE is needed, so that the cost of test increases. One of the challenges is how to compress the increasing test data, and the test data compression of SoC is studied in the dissertation.The test data compression is a feasible measure to resolve the problem of SoC test and can be used to decrease the SoC test data volume. During test, the compressed data can be decompressed to the original test vectors with the decoding circuit, and then the test vectors are loaded into the CUT to finish the test.Code compression technology is an important embranchment of the test data compression, and has been paid more attention by many academies. Some related concepts about SoC test and some typical code techniques are introduced in the dissertation.A new scheme based on dimidiate partition is proposed, in which the whole test set is partitioned to several length-fixed blocks. For non-0/1 data block it uses dimidiation technique, and for 0/1 data block it makes use of some mark-bits to represent the numbers of partitioning. Compared with the traditional data-coding methods, the proposed scheme only needs to know the numbers of partitioning to express the data length. It uses a simple circuit structure and communication protocol to decompress the coded test data.Besides, a test data compression method based on packet-sharing and bit-flipping is presented. It takes advantage of the characteristic of test set distribution to compress the test set. The whole test set is classified according to the rule that the determinate bits between the vectors are at the same position. As one seed is shared by the test patterns in one group, the number of the seeds is reduced, the seeds are utilized effectively. In decompression process, by the address information and flipping signal of the position that is different from the list using LFSR reseeding, the original test patterns can be obtained. The scheme has the prominent advantage on the compression rate.