Soc Test Data Compression

IP cores reusing based SoC designing method greatly predigests the designs and shortens the lead time to market. With embedded IP cores increasing, test volume and application time grow rapidly. With extremely expensive ATE, enlarging the storage capacity and transmission bandwidth by upgrading ATE will increase the costs remarkably. SoC testing has drawn more attentions. To address the issues of large test volume, the most effective solution is to compress the test sets. SoC of higher densities also bring up challenges to the test compression technology. How to improve the compression rate turns to be the core strategy to conquer the challenge.Two schemes are proposed on compression. The main work done is as follows:(1) On encoding based compressions, a coding strategy is proposed called improved transition continuum sequence coding (ITCS). It comes from the idea that the improved freedom degree of x bit value assignment and encoding selection optimization can be obtained by taking only the expense of one additional bit expansion of the encoding bits, as compresses test data and reduces test application time effectively. Experiments on test sets of ISCAS-89 benchmark circuits show that the proposed scheme is a more efficient compression technology than EFDR.(2) On LFSR-based reseeding compressions, the proposed method called grouping based bit-fixing VL-LFSR reseeding technique is used to enhance the compression efficiency. Using a certain algorithm to group the test vectors can realize the best bit-fixing effect. Fixing the consistent bits by groups, seen as an x when encoded, reduces the deterministic bits in test sets encoded by LFSR reseeding significantly. Experiments on the test sets of ISCAS-89 benchmark circuits by MINTEST show that it can efficiently compress test data and is superiority to other LFSR based reseeding method, to be a reasonable method for SoC test data volume reduction.ITCS and Grouping based bit-fixing VL-LFSR reseeding technique presented in this thesis can relieve the steep demand to the test hardware and save the instrument purchase cost. Both have large practice engineering value.