Research On CCSDS Image Compression Algorithm And FPGA Implementation

Along with the development of modern space technology, space image processing is widely used in military scout, geological reconnoitre, forest fireproofing and so on. It is a crucial task for satellites, airships, and space stations to send the real-time information to the earth. But the data volume of space image is always very big, and channel capability is limited. For reduce the data volume, it is necessary to compress the image data.CCSDS (Consultative Committee for Space Data System) formally proposed the space image data compression algorithm standard in November, 2005. This recommendation has a low complexity and simple structure to fit for hardware implementation, and support high speed real-time space image processing. In this thesis, CCSDS image compression algorithm is implemented on FPGA. The main accomplished tasks of this thesis include the following parts:(1) The CCSDS coding algorithm is studied deeply, and compared with JPEG2000 and SPIHT algorithms on complexity and performance.(2) The CCSDS image coding algorithm is implemented on FPGA using Verilog HDL and the complex modules are optimized, like the discrete wavelet transform, its optimizing methods include: shift and addition is used to replace the multiplication and division; pipeline technique is used to raise the clock frequency; row and column DWT parallel technique is introduced to reduce the number of clock cycles.(3) The whole system is simulated and verified functionally and timingly in ISE and ModelSim environments, the RS232 serial port is designed at the stage of FPGA hardware verification to reduce the verification time.The CCSDS image compression system is implemented successfully on XC2V2000 of Xilinx Virtex-II series. The system is verified on the effectivity and performance by a number of test images.