Research And FPGA Implementation Of CCSDS Image Compression Algorithm

Along with the development of aviation, there are more demands about high speed and real-time property for space image compression. The characteristic of spatial image is that it has plenty of information and that there are high demands about image reconstruction quality. Now the channel bandwidth resources are limited, and the compression algorithm should be effective and excellent in real-time property. CCSDS (Consultative Committee for Space Data System) formally proposed the space image data compression algorithm standard in Nov. 2005. This protocol has a low complexity and a simple structure to fit for hardware implementation and support loss and lossless compression, so it has a good prospect in space data encoding.The implementation of image compression relies on the performance of hardware. FPGA has the excellences about miniaturization, high integrity level and low power waste, so the CCSDS encoder is realized on the FPGA. The main task completed of the thesis is as follows:(1) The CCSDS encoder structure is designed based on the study of CCSDS encoder algorithm. The results of algorithm performance are given between JPEG2000, SPIHT and CCSDS.(2) CCSDS encoder is implemented with Verilog Hardware Description Language. The functions are completely realized and the encoder supports loss and lossless compressions.(3) The whole system is functional and post simulated in both ISE and ModelSim software environments.(4) The whole system is tested on FPGA of Xilinx Company. The reconstructed image of lossless, 4pp, 2pp and 1pp compressions for spatial image have a high quality. There are two choices for discrete wavelet transform which is that image domain partitions or not. The SNR comparison between the two ways is given about the reconstructed images and the results indicate that the performance of partitioning in image domain declines about 1dB.