Research And Design Of 10-bit SAR ADC Based On CMOS Technology

There are more and more requirements of transformation from analog signals to digital signals with the extensive application of the computer and the development of newly science and technology such as informatics, processing of digital signals, etc. The analog digital converter (ADC), which is the bridge of transforming from analog signal to digital signal and the key of development of electronic technique, has therefore been widely used in many application fields. It should be realized in proper architecture according to its specific application. With the fast development of signal processing technology and the continually extension of application fields, data converter is expected to have more improvement in its performances, such as speed, resolution, power consumption, signal-to-noise ratio and dynamic range, etc.The paper choose successive approximation register analog-to-digital converter as an important object to study after analysis the performance of some ADC. SAR ADC is a common architecture for middle to high accuracy applications which require the sampling rate less than 5Msps. In general, the accuracy of SAR ADC is 8-12bit, it has the characteristics of low power and small scale, etc. SAR ADC is widely used in many application fields, such as instruments easy to taken, appliances supplied by battery, pen input quantization, industry control and signal collector, etc.In this paper, a 10 bit SAR DAC is designed by using 0.6μm CMOS technology and 2.5V power voltage. In design, some technique is adopted to improve the precision and speed of the analog signal. Sample and hold circuit utilizes dummy switch technique to reduce the non-ideality performance caused by switch charge inject. Differential transconductance amplifier with compensation has higher gain and bandwidth. The switched operation comparator improves the conversion rate of low-power low-voltage SAR ADC. Register and digital control logical utilize D trigger to store and control, so the circuit is simplified. The whole circuit is simulated at system level. The result shows that the precision is 10 bits resolution, maximum sampling rate is 1Msps and power dissipation of 3mW.