Nano-electro-mechanical switch (NEMS) for ultra-low power portable embedded system applications: Analysis, design, modeling, and circuit simulation

To overcome the excessive quiescent dissipation in Nanometer-CMOS technology, especially in portable embedded system computing where the energy efficiency, cooling system and environment changes are more important than the speed. In this work, I investigated a Nano-Electro-Mechanical Switch (NEMS) that offers novel characteristics in terms of virtually zero leakage current, low operating voltage ∼1-1.2 V, high switching speed ∼1-1.4 ns, and footprint size. Furthermore, this switch can be fabricated easily by using the modified CMOS fabrication process and equipment. These features make this switch a good candidate to address the energy efficiency problem in Nanometer-CMOS technology without extreme cost.;In this work, the NEMS switch that mentioned previously is studied. The study involves analysis, design, modeling, and building a circuit simulator. This switch is designed to mimic CMOS transistor's structure and configure to N-channel and P-channel similar to NMOS and PMOS correspondingly in CMOS technology. Thus, the design of NEMS computational and sequential circuits can be expedited by using CMOS design concepts and CAD tools. This switch is designed to have simple structure that can be fabricated easily by using the modified CMOS fabrication process and equipment. In modeling this device, a new approach is developed to derive an accurate device circuit simulation model (Macromodel). In this approach, a Finite Element Analysis (FEA) physical device model is constructed. Using this FEA physical model and the fabricated device measurements, an accurate device circuit simulation model (Macromodel) is derived and calibrated. The derived Macromodel is capable of mimicking the physical device in a circuit environment in a circuit environment within average error is around 10% to the physical device model.;To evaluate an arbitrary NEMS circuit accurately, a circuit simulator is built. The circuit simulator uses the derived circuit simulation model and the circuit simulation techniques.;Finally, to demonstrate the power advantage of using CNEMS technology in implementing computational and sequential circuits, circuit simulation experiments were conducted. The experimental results reveal significant improvements in reducing the quiescent power dissipation in CNEMS benchmark circuits over the counterpart Nanometer-CMOS benchmark circuit, moreover, improvements in reducing the active power dissipation in CNEMS circuits over Nanometer-CMOS is demonstrated.