Nanometer-cmos - Globe Thesis

Keyword [Nanometer-cmos] Result: 1 - 20 \| Page: 1 of 2
1.	Precise Model And Parameter Extraction Research In Sub-nanometer CMOS Technology Parasitic Effect And Its Variation
2.	Digital Calibrated Pipelined ADC Design In Nanometer CMOS
3.	Thermal-Aware Power Dissipation And Delay Of Nanometer Scale Interconnect Line
4.	Interconnect Crosstalk Estimation And Delay Optimization Based On 65 Nanometer CMOS Technology
5.	Research On Optimization Model Of Nanometer Interconnect With Multiple Target Constraints
6.	The Nanometer CMOS Interconnect Performance Study Considering Process Variations And Scattering Effect
7.	High Performance Bjt. Nanometer Cmos Process Research And Modeling
8.	SUB-90 Nanometer CMOS Device PSP Modeling And Parameters Extraction
9.	Study On Hot Carrier Effects Of Nanometer CMOS Devices
10.	Low-voltage Low-power Bandgap Reference Research Under Nanometer CMOS Process
11.	Research On The Design Of Low Power Domino Circuit In Nanometer CMOS Technologies
12.	Single Event Multiple Transient Effect And Its Mitigation In Nanometer CMOS Integrated Circuits
13.	Research On Low Power Low Noise Amplifier With Nanometer CMOS Technology For Wearable Smart Device
14.	Study Of Proton Radiation Effects On Nanometer CMOS Integrated Circuits
15.	Single Event Multiple Transient Effect In Nanometer CMOS Integrated Circuits
16.	Study On The Influence Of Metal Gate Work Function Variation On New Integrated Nanodevices
17.	Dynamic threshold technique for soft error mitigation in nanometer CMOS circuits
18.	Study of process variation in nanometer CMOS technology using multiple on chip test structures
19.	Nano-electro-mechanical switch (NEMS) for ultra-low power portable embedded system applications: Analysis, design, modeling, and circuit simulation
20.	High-speed optical receivers in nanometer CMOS
<<First <Prev Next> Last>> Jump to