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Design Of Cmos Radio Frequency Integrated Circuit Unit

Posted on:2006-08-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y YouFull Text:PDF
GTID:2208360152497253Subject:Radio Physics
Abstract/Summary:PDF Full Text Request
In recent years, with the rapid growth of the 3rd mobile communication, GPS, WLAN and Bluetooth, CMOS RFIC is recognized as a fascinating candidate to meet the demands of low-cost, high integration and low power technology. In this thesis, a L-band low noise amplifier (LNA), a SPDT (single-pole double-throw) Switch and a passive mixer in the RF front-end of the "Beidou"NO. 1 Receiver of Navigation and Positioning satellite are analyzed and implemented using TSMC 0.25μm CMOS process, which are prepared for full integration of receiver in the front-end. The dissertation can be divided into several parts as the following: In chapter 1, the development and trend of CMOS RFIC in home and abroad are introduced. Chapter 2, 3 and 4 dissertates the basic design theories and detail design processes of LNA, SPDT switch and passive mixer, including the design and optimization of the layout. LNA exhibits a gain of 10dB and noise figure of 1.6dB. SPDT switch exhibits insertion loss of 1.6dB or so and isolation of 55dB. Their performances satisfy the specification. At last, chapter 5 summarizes the above design work.
Keywords/Search Tags:CMOS RFIC, LNA, SPDT switch, Passive mixer
PDF Full Text Request
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