The Research On Input Decoding Circuit And Current Switch Driver Circuit In High Speed High Resolution CMOS D/A Converter

In recent years, with the great advancement of integrated circuit technology, the continuous development of the integrated circuit technology in the communications applications field and the rapid growth of the broadband data transmission technology in the Digital Video System, the need of high-speed, high-resolution data converters (ADC and DAC), and SOC (system on chip) with high-performance data converter become more and more important. With the features of fast slew rate, effective use of silicon area and power, and easily compatible with standard digital CMOS process, CMOS Current-Steering D/A converter becomes the best choice in these applications.Firstly, the paper introduced the basic principles of the current-steering D/A converter structure, and evaluated the D/A converter performance of the various parameters. Then it analyzed the factors which affect the performance of Current-Steering D/A converter. On the basis of the analysis, it proposed the input decoder algorithm and the circuit implementation. And the paper also designed current switch drivers for the nmos and pmos current source matrix. The input decoder circuit is mainly constrainted by the decoding delay, so reducing the decoding delay become the main target. and we also have to make sure the delay of each signal is as same as possible. After use the most simplified algorithm, we can use current-mode logic or transmission gate logic to reduce the delay time, or use pipe-line decoding approach to reduce the constraint of delay time. The current switch driver is mainly to adjust the signal waveform, to make sure the signal which input to the current source switch will not make the two switches shutoff simultaneously. the driver also have to synchronous signal, reduce the swing range of the signal, etc. and improve the dynamic performance by reduce the glitch of the output signal.This paper designed a 10-bit CMOS 1GHZ Segmented Current-Steering D/A converter, used the decoder circuit and current switch driver circuit mentioned before, based on SMIC0.18μm technology. and the system simulation of this D/A converter was ran by use of SPECTRE and Verilog-A language, INL and DNL are less than±0.18LSB and±0.15LSB respectively. Under the sampling frequency of 1GHz, output frequency of 482MHz,the spurious free dynamic range is 85dB.The effective area of this D/A converter chip is 0.43×0.52mm~2 .