Design Of 11T SRAM Memory Cell With High Stability And Low Static Power Consumption

With the progress of science and technology and the state’s attention to the semiconductor industry,more and more R & D talents are invested in the chip R & D industry.However,in the current situation,the transistor size is smaller and smaller,the integration is higher and higher,and static random access memory(SRAM)has higher requirements for process parameters.Moreover,in the memory,the area of the storage array accounts for a large proportion.This leads to a slight increase in leakage current with the decrease of transistor size,which will increase the power consumption.In order to reduce the power consumption,the method of reducing the power supply voltage can be adopted,but the decrease of the power supply voltage will affect the size of the static noise tolerance,the static noise tolerance has a direct impact on the stability of the cell.This thesis studies and analyzes the stability and static power consumption of the storage cell under the 65 nm process.In this thesis,a new type of 11T memory cell is designed.Based on the 6T cell,two PMOS switches are added between a pair of pull-up transistors and bit lines,and a word line is added to improve the write margin.In addition,two additional buffer transistors,a tail transistor and a complementary word line are added to the lower part of the 6T cell.When writing,because the two switches are open,the storage node on the side where the high level is stored can discharge the bit line through two paths,which reduces the ability of this side to maintain the high level.On the other hand,the source of the pull-up tube on one side is connected to the high level of the bit line,which can make the data flip quickly and greatly improve the writing margin.During the reading operation,the static noise tolerance of reading is greatly improved because it can discharge to the ground through multiple paths.At the same time,the tail pipe is kept in the off state,which can reduce the leakage current and static power consumption.The stability and power consumption of the unit are analyzed,and the working principle of the unit is introduced in detail.After that,the static noise tolerance of the new cell is analyzed,and the butterfly curve method,word line voltage driving method and bit line voltage driving method are adopted.Through analysis,it can be seen that the stability of this unit is greatly optimized.Then,the minimum operating voltage,operation delay and process variation resistance of the unit are simulated and analyzed,which shows that the unit has a lower operating voltage and a stronger process variation resistance structure.Finally,through the measurement and analysis of leakage current and static power consumption,it can be seen that this unit has great advantages in static power consumption compared with the traditional 6T unit.Therefore,the unit meets the design requirements in terms of stability and low power consumption.