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Research And Implementation Of CNN-Oriented Low Power Consumption SRAM Array

Posted on:2021-09-25Degree:MasterType:Thesis
Country:ChinaCandidate:Z K CaoFull Text:PDF
GTID:2518306557492004Subject:Microelectronics and Solid State Electronics
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Convolutional Neural Networks(CNN)has acquired excellent classification effect in Visual Perception,even better than human vision.However,with the development of the network,CNN has high accuracy but faces energy efficiency and bandwidth bottlenecks of memory because of the large-scale training data and deep network structure.Therefore,it is of great significance to further reduce the power consumption of Static Random Access Memory(SRAM)in order to improve the computational energy efficiency of CNN.This thesis designed a low-power SRAM storage array for CNN based on the experience of the research group in SRAM and complete the tapeout and test work using the SMIC 14 nm process in order to solve the bottlenecks which faced by CNN.It is different from the traditional SRAM that wide IO SRAM cancels the column selection function and expands the IO width by 3 times in order to meet CNN's demand for large bandwidth SRAM and reduce read and write energy consumption.In addition,the two-stage decoding structure is adopted by decoding circuit to reduce the circuit delay,and the replication bit line technology is adopted by sequential circuit to reduce the influence of process changes on the read and write timing of SRAM.The test results show that under the working voltage of 0.48 V to 0.9V,the SRAM accuracy rate is100%;under the working voltage of 0.72 V,0.8V and 0.88 V,the average read and write power consumption per bit is 0.0139 ?A/MHz,0.0157 ?A/MHz and 0.0187 ?A/MHz are reduced by66.98%,65.4%,and 62.15% compared with the SRAM before improvement.This thesis gives a CNN energy consumption model based on NVDLA and predicts the optimization effect of wide IO SRAM on CNN computing energy efficiency.The CNN energy consumption model shows that the energy consumption of convolution operation mainly includes SRAM energy consumption and MAC energy consumption,accounting for 51.39%and 48.61%.In this thesis,the wide IO SRAM model replaces the typical SRAM model of CMUX=4 and keeps the other architectural parameters unchanged.The energy consumption analysis results show that the wide IO SRAM of CMUX=1 can reduce the SRAM energy consumption by 64.76% and improve the energy efficiency of CNN calculation by 33.28%.
Keywords/Search Tags:Convolutional Neural Networks, Static Random Access Memory, Low Power Consumption, IO Expansion
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