| Analog to Digital Converter(ADC)can achieve the conversion between analog and digital signals,becoming a bridge between the analog and digital domains and playing a crucial role in many electronic related fields.With the continuous development of electronic technology and information processing technology,the demand for high-speed and high-precision ADC has become increasingly urgent.However,limited by semiconductor manufacturing processes,it has become increasingly difficult to improve the sampling rate and performance of a single ADC.Therefore,researchers have designed,implemented,and applied Time Interleaved ADC(TIADC)based on time interleaved structure.TIADC has become a research hotspot in the field of ADC in recent years,as it can improve sampling rate and maintain accuracy through alternating sampling of multiple ADCs at suitable power consumption.However,due to the different physical characteristics of each sub ADC,spurious noise will be introduced at a specific frequency after time interleaving.The bias,gain,and sampling phase deviations of each sub ADC can cause misalignment,gain mismatch,and sampling time mismatch errors in TIADC,seriously affecting its dynamic performance.At present,using backend digital calibration to achieve TIADC calibration has become one of the research frontiers and hot topics in the field of ADC.This article proposes a comprehensive background adaptive digital calibration method for three typical mismatch errors of TIADC.Calibrate the imbalance mismatch error using an average DC extraction method;For gain mismatch,first use adaptive LMS algorithm to achieve error estimation,and then complete error calibration through digital compensation;For the time mismatch error,relevant estimation algorithms are used to estimate the time deviation,and then a Farrow structured fractional delay filter is used for time calibration.At the same time,a four channel extension is constructed for the LMS-FIR method,and finally,a four channel TIADC adaptive calibration is achieved based on the LMS-FIR and fractional delay filter.Finally,in order to achieve rapid and accurate evaluation of TIADC calibration algorithms,this paper combines hardware experimental verification with fast algorithm deployment to address the existing problems in the evaluation of TIADC calibration algorithms,and designs and implements a four channel TIADC calibration algorithm fast evaluation platform.The software and hardware design and deployment of the evaluation system were implemented in a laboratory environment,and the testing and evaluation of the four channel TIADC calibration method was well implemented. |