Font Size: a A A

Research On Calibration Technique For Channel Mismatch Errors In Time-Interleaved ADC System

Posted on:2011-07-08Degree:MasterType:Thesis
Country:ChinaCandidate:Q WangFull Text:PDF
GTID:2178330338979851Subject:Automated test and control system
Abstract/Summary:PDF Full Text Request
In the broadband signal and non-stationary signal test, higher requirements, mainly in the sampling rate and sampling precision of both, is presented for the data acquisition system. Currently, most ADC chips can not take into account the sampling rate and sampling precision at the same time. This situation makes the building board-level high-speed, high-precision data acquisition system seems powerless. Time-interleaved parallel sampling technique is a new high-speed, high-precision sampling technique, which uses relatively low-speed multi-chip ADCs sampling different points of the input signal waveform at the same time and then stitching the sampling data of each channel to ultimately improve the system sampling rate. This structure can overcome the chip-level constraints, while taking into account the sampling precision, greatly improve the system sampling rate. However, the channel mismatch errors caused by the parallel sampling would reduce the overall system performance. Therefore in-depth study of time-interleaved parallel sampling techniques, especially for channel mismatch error estimates and calibration algorithms is of great practical significance.In this paper, based on a detailed analysis of time-interleaved sampling channel mismatch errors, the parallel sampling channel mismatch error estimates and calibration of digital post-processing algorithm is studied depthly. In the 1GSa/s (2-TIADC) data acquisition system, an interactive verification system based on LabWindows/CVI and Matlab is designed to achieve experiment verification for the post-processing algorithms.In the study of channel mismatch error estimation algorithm, the paper focus on the blind estimation algorithm and fitting estimation algorithm. For the problem that when the signal frequency is unknown or high enough, the fitting estimation is failure, the paper offers improved algorithms. As for the situation that the input signal frequency is unknown, the paper proposes a method that first measure the signal frequency with the single-channel data using the FFT transform, then using the error estimation algorithms. As for high frequency situation, sine interpolation is taken to the original data firstly, then using the error estimation algorithms. Experiment verification results show that the two algorithms could accurate estimate the channel mismatch error.In the study of channel mismatch error calibration algorithm, an offset and gain mismatch error normalized calibration method and fractional delay filter calibration method for non-uniform sampling error is presented. The normalized method can calibrate offset and gain mismatch error at the same time, the method is simple, computation and high accuracy. For the calibration of non-uniform sampling error, the method of fractional delay filter design is given. Experimental results show that the system mismatch error is amended, and the overall performance is much improvement.Finally, main dynamic parameters before and after calibration target (signal to noise distortion ratio, spurious free dynamic range, effective number of bits) are tested and analyzed. The results show that the parallel sampling channel mismatch errors will reduce system performance, but after calibration, the system performance is improved significantly.
Keywords/Search Tags:time-interleaved ADC, channel mismatch error, time mismatch error, experiment verification
PDF Full Text Request
Related items