Study On Synthesis Calibration Algorithm Of High Speed TIADC Parallel Sampling System

The rapid growth of modern electronic signal's complication, especially the wide band and non-stationary characteristics, makes it very difficult for the traditional frequency-domain sweep test to meet the test requirements of broad-band and transient signal. The time-domain test measurements based on real-time sampling, as represented by digital oscilloscope, are becoming the mainstream of electronic instrumentations'development, and also gestating an important transformation of electronic instrumentation systems.The dependence on sampling rate and sampling accuracy has already become the bottleneck of modern time-domain test instruments. Higher sampling speed and sampling precision mean that the instrument could sample wider-band signal and have stronger signal reconstruction ability. Although the monolithic ADC has achieved a remarkable sampling speed in recent years, it is still hard to guarantee high sampling speed and high sampling accuracy simultaneously. Due to the restriction of electronic device as well as manufacture technique, the most effective method to acquire high sampling speed as much as possible and maintain sampling precision, is to build Time-interleaved parallel sampling system.However, Time-interleaved parallel sampling technique relies on the exact matching of channels. Unfortunately, it is tough to achieve strict identicalness of gain and offset among various channels and synchronize of sampling clock's phase delay accurately. All of these problems will result in signal nonuniform sampling and degrade the system's performance seriously. How to use digital signal processing method to calibrate the sampling signal is the emphasis of this dissertation. Combining with two research projects granted by National Natural Science Foundation of China, and focusing on the high performance time-domain test instruments such as wide-band parallel sampling digital storage oscilloscope and so on, this dissertation mainly does some thorough research on the following aspects:(1) Time-interleaved parallel sampling system behavioral model establishment. Through the analysis of Time-interleaved parallel sampling system's basic structure and principle, this dissertation established Time-interleaved parallel sampling system's behavioral model based on Matlab, profoundly analyzed the origination of channel mismatches and the nonuniform signal frequency spectrum characteristic, and deduced the computation of ADC system performance.(2) Channel mismatches blind estimation method. Based on channel sampling data statistics, this dissertation proposed two time skew error estimation algorithms using the adaptive blind estimation and the maximum likelihood correlation estimation method. Based on channel mismatches characteristic, the channel mismatches self-adaptive synthesis estimation model was established. This dissertation gave self-adaptive time skew error estimation algorithm based on frequency domain. For different applications of input frequency, it also gave two self-adaptive synthesis estimation algorithms based on time domain, which were the linear interpolation and the fractional interpolation estimation method. Taking the influence brought by three kinds of channel mismatches in consider, these methods carried on self-adaptive mismatches synthesis estimation at one time.(3) Nonuniform signal reconstruction method. First, using Fourier analysis capability provided by most time-domain measuring instruments, this dissertation proposed a multi-channel frequency spectrum reconstruction method based on frequency-domain processing. Second, the linear interpolation method and the fractional interpolation method were applied to time-domain signal reconstruction, and channel mismatches were solved simultaneously. By contrasting their reconstruction effects, we gave the condition of these two time-domain reconstruction algorithms, and evaluated the system performance. And new fractional interpolation filter criterion and optimization design method were proposed.(4) 2GSa/s two-channel Time-interleaved parallel sampling system application. A practical two-channel ADC parallel sampling digital storage oscilloscope system based on two ADCs(AT84AD001: 1GSa/s,8Bit) Time-interleaved sampling technology was introduced. Using flexible FPGA post signal processing, this system realized the FD filter and the real-time mismatches synthesis calibration. 10MHz and 150MHz sinusoidal signals were applied to confirm the performance separately, and the evaluation of the system performance has verified the validity and feasibility of synthesis algorithm.