High-speed Signal Acquisition And Processing System

The analysis and sampling of millimeter wave radar signals requires a high-speed signal acquisition system for signal acquisition.In order to collect high-speed signals,the system must have a high sampling rate and a good signal-to-noise ratio and sampling number.A single acquisition system cannot meet the current diversified needs.The FPGA responsible for signal processing and transmission does not have strong computing capabilities.Exporting data and then computing increases the complexity of the system,and it is used in application scenarios with high timeliness.Cannot meet application requirements.There is a strong market demand for a system module with high integration,high sampling rate,high sampling number,high computing power and high timeliness,and it is also the development trend of the system in the future.This thesis is based on the Shanghai Geometry Partner Vehicle Radar Antenna Test and Simulation System Project.It mainly completes the work of the baseband module,which is responsible for the generation of target analog signals.By studying relevant information and analyzing project requirements,this article mainly designs a high-speed data acquisition and processing system with high-speed ADC,high-speed DAC,and strong data computing capabilities,communicating with the host computer through the network port and transmitting data.The work of the thesis mainly completes the design of the overall system plan,and completes the design and debugging of the high-speed signal acquisition and processing system based on FPGA and DSP.FPGA controls the ADC to sample,and stores the sampled data in the DDR3 buffer after being processed at a reduced speed.The data is selected to be transmitted to the DSP for processing as required.The control of the power-on sequence is completed through STM32,and the upper computer configures the FPGA through the network port configured by STM32.The collected high-speed data can be sent to an external memory through the Gigabit Ethernet interface connected to the DSP.FPGA can control the DAC to replay the data.The hardware is optimized for high-speed data transmission,the interference that may be encountered during signal transmission is explained,the interference elimination of key transmission lines,and impedance control are explained in detail.This article discusses the heat dissipation of the system,analyzes and studies the heat generation of the system,and makes a solution for the heat dissipation.The function of each module of the system was verified based on the existing conditions of the laboratory,indicating that the performance indicators of the system met the requirements of the project design.Based on the premise of the target simulator,the feasibility of the system to achieve the target simulation was preliminarily tested.Finally,through the analysis and discussion of the problems found in the testing process,a systematic improvement plan is proposed.