Design Of Key Components Of Active Phased Array RF Front End

With the rapid development of 5G communication,space earth integrated network,high-precision imaging and other fields,electronic systems require more and more multi-beam,large bandwidth and low latency.Therefore,active phased array technology has become one of the research hotspots,and its application is more and more wide.Local oscillator and phase shifter,as the key components of active phased array system,have an important impact on the performance of phased array system.Therefore,this paper focuses on the research of local oscillator and delay line,which reduces the phase noise of local oscillator,reduces the circuit area of delay line,efectively reduces the volume of phased array RF front-end,and improves the reliability of RF front-end.The main research contents and innovations are as follows.To solve the problem of low precision of high frequency signal,a 20 GHz charge pump phase-locked loop is designed based on 130 nm Si Ge Bi CMOS process.The differential Colpitts VCO is improved to reduce the phase noise and improve the signal stability.At the same time,the 128 divider chain is realized by cascading 7-Stage two divider.The ground structure of current mode logic and voltage mode logic circuit is used innovatively,which greatly reduces the chip area while achieving high frequency performance.The divider chain is used in the feedback loop of the PLL,which improves the frequency division ratio and makes the PLL realize 128 times frequency amplification of the reference clock signal.To solve the problem of large area of planar microstrip delay line,a flexible circuit board is used to transform the planar structure into a three-dimensional circuit,which effectively reduces the area of delay line in phased array packaging system.In this paper,a 20 GHz narrowband true time delay system is implemented,and five kinds of delay lines are designed,which are 75 ps,100ps,125 ps,150ps and 175 ps.The flexible dielectric substrate can be bent to a certain extent,which reduces the area of the circuit in the package by 68%.