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Research On Ultra Low Power MTP Memory IP Core Based On Standard CMOS Process

Posted on:2020-04-19Degree:MasterType:Thesis
Country:ChinaCandidate:S Q XuFull Text:PDF
GTID:2518306548490334Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
Ultra low power multitime programmable(MTP)non-volatile memory(NVM)based on CMOS process,as an embedded memory,has the following advantages: low cost,high reliability and low power operation.As the development of internet of things(Io T),there are more and more wide applications for the ultra low power MTP non-volatile memory.The main research contents of the subject include the following three aspects:(1)A new MTP non-volatile memory cell using high-voltage NMOS is proposed.A PMOS transistor is used for programming,erasing,and reading,and a high-voltage NMOS is used for selecting the memory cell.The memory cell has fewer number of transistors and terminals compared with the typical conventional memory cell.This reduces the area consumption and simplifies the implementation of memory's external circuit.In addition,the sub-threshold swing(SS)of the memory cell is improved for larger coupling ratio.Experimental investigation on transfer characteristics,endurance,retention,and threshold voltage VTH shift and leakage current of the high-voltage NMOS of the memory cell are presented.The experimental endurance behaviour of the proposed memory cell is better than the conventional memory cell.A compact SPICE model of MTP memory cell is built.(2)The structure and operation method of MTP memory array are designed.Comparing with differential memory cell structure,one half area is saved though using the single ended memory cell structure.Both the program and erase inhibiting operation of the memory array are realized by self-boosted program and erase inhibiting scheme,which lowers the power of program and erase operation.Characteristics of program and erase,endurance and data retention of the memory array are researched.(3)The architecture of ultra-low power MTP non-volatile memory is analyzed.Key circuit of the MTP memory is explored,including read operation circuit and write operation circuit.A read operation circuit and a program-verify method are presented,which is suitable to variable program-verify voltage.A MTP memory is designed,simulated and manufactured.The experimental characteristic of program and erase,endurance,retention behavior are researched.
Keywords/Search Tags:CMOS Process, Low Power, Non-volatile Memory, Mutitime Programmable, Memory Cell, Endurance, Retention
PDF Full Text Request
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