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Research On Pumping Circuits Of Non-Volatile Memory In Standard CMOS Process

Posted on:2017-03-17Degree:MasterType:Thesis
Country:ChinaCandidate:M X ZhangFull Text:PDF
GTID:2428330569498745Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Non-volatile memory,which can store the data for a long time without the power supply,so it apply to Radio Frequency Identification(RFID)electronic tag chip,portable electronic products,smart home and other fields extensively.Due to the high-voltage erase and write characteristics of the memory,design a high efficiency boost system becomes critical.This paper mainly focuses on the design of a high efficiency boost system in the single gate non-volatile memory based on standard CMOS process which applied in RFID chip.In this paper,the principle of the basic charge pump was analyzed theoretically,the main performance parameters of the charge pump were introduced,the key factors affecting the charge pump performance were found out,and the direction of the charge pump structure was optimized.this paper proposed a four-phase clock charge pump with an output stage based on the study of the four-phase clock charge pump's characteristics and the main factors which affect it's performance.The improved four-phase clock charge pump circuit adds a dynamic well bias and a limiting voltage protection mechanism to eliminate the liner bias effect.When a high voltage erase voltage is required for the nonvolatile memory Fully open,eliminating the threshold voltage loss.In the SMIC 0.13?m process,when the power supply voltage is 1.8V and the load current is 100 nA,the improved charge pump can output a maximum voltage of 18.3V and an output efficiency of 69%.In the output 8.3V voltage,the maximum load current of the charge pump up to 450 nA,therefore,improved charge pump with a better load capacity.In this paper,a novel cross-coupled charge pump circuit is proposed,and the improved cross-coupling charge pump circuit adopts the method of substrate cross-connection to realize bias adjustment,while reducing the body effect on the threshold voltage.The SMIC 0.13?m process achieves a maximum conversion efficiency of 83% at a supply voltage of 1.8V.According to the voltage requirement of the non-volatile memory,a boosting system is designed to meet the requirements of erasing and writing.The function of the high-voltage generating system with the composition sub-circuit of the charge pump and the connection feedback relationship are summarized,and each sub-circuit is designed.Including the clock generation circuit,the voltage divider circuit,the comparator,the discharge circuit,and carries on the simulation analysis to the whole,verifies its boost realization function correctness.And the whole high-voltage system is simulated in SMIC 0.13?m process.High-voltage output of 11.67 V,the mid-output voltage is 6.58 V,which meets the needs of memory erase.
Keywords/Search Tags:non-volatile memory, standard CMOS process, charge pump, four phase, cross couple
PDF Full Text Request
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