Research On Device Modeling And Key Circuits Of Non-volatile Memory In Standard CMOS Process

With the wide application of Radio Frequency Identification(RFID)technology,the demand for RFID tag chips is increasing.Non-volatile memory is the indispensable main modules in RFID tag chips,its power consumption,manufacturing process and area respectively decide the recognizable distance,cost and application fields of tag chip.Therefore,the research of standard CMOS non-volatile memory with low power consumption and small area will improve the performance of RFID tag chips.It also has a significant role in promoting the development of Internet of Things.At first,this paper introduces the non-volatile memory's background and internationally research progress,submits system architecture and pin definitions of non-volatile memory,expatiates memory's storage mechanism,and lists main design indices of memory.Then,this article describes the process of establishing a model of non-volatile memory cell and designing the peripheral circuit of non-volatile memory.First of all,in order to design a memory cell with good performance and analog memory actual work process,a macro model for single poly non-volatile memory cell is established.The cell model is simulated by HSPICE circuit simulator.Comparing the simulation results with the simulation results of TCAD process model and measurement data obtained from memory cell respectively,they have good consistency.Then,in order to reduce the memory's area,on the basis of guaranteeing its reliability,a compact memory array is designed.Next,the key modules of the peripheral circuit have been made a detailed analysis in this paper.And this paper presents a full compatible with the stanrard CMOS process and high efficient charge pump structure,which effectively eliminates the negative effect of the MOS transistor's threshold voltage and body effect to improve its efficiency.A high-reliability and low-power voltage switch circuit whose power consumption is only 3.1% of the traditional switch circuit is proposed.A high-speed and low-power sense amplifier is designed,which sensing delay is 8.39 ns and power consumption is 167 nW.Compared with the traditional sense amplifier,both in terms of sensing delay and power consumption it has certain advantages.Finally,the non-volatile memory designed in this paper is overall simulated by SPECTRE to verify its functionality and performance.Simulation results show that the designed single poly non-volatile memory in standard CMOS process can perform accurate read and write operations,and its write and read power consumption is 3.08?W and 2.14?W respectively,its area is 0.0652mm2.It meets the design specifications.