Research On 1S1R Crossbar Array And The Effect Of Selector On Its Performance

Memory is one of the key block of today’s integrated circuits.With the rapid development of semiconductor industry,the requirement of memory is more and more high.Due to the limit of the scalability of the traditional flash memory,it can not meet the current 20nm integration requirements and is gradually replaced by other new memory.Among them,resistive random access memory（RRAM）is considered as a new type of nonlinear memory to the next generation NVM.The integration mode of RRAM is usually the most integrated crossbar array structure.However,the problem of leakage current occur easily in RRAM crossbar arrays.Therefore,a new One Selector One Resistor（1S1R）crossbar array is proposed.1S1R crossbar array can control the state of unselected cell and half-selected cell in the crossbar array,so that these elements can be kept in the high resistance state,which will reduce the leakage current in the1S1R cross array.Therefore,the power consumption of 1S1R crossbar array has been widely concerned.Based on the Verilog-A model of the new 1S1R,this paper designs the peripheral read-write circuit of the 1S1R crossbar array and explores the influence of selector on the performance of the 1S1R crossbar array,including read margin（RM）,write margin（WM）,read power（P_r）,write power（P_w）and so on.The innovative and research result are as follows:1.Based on the Verilog-A model of 1S1R unit,the peripheral read-write circuit of 1S1R cross array is designed and tested by Cadence Vrituoso software.Firstly,the Verilog-A model of 1S1R was tested with linear triangular wave voltage,the experimental results show that the1S1R model can reduce the current of the memory in high resistance state.Secondly,according to the working principle of 1S1R crossbar array,we design the peripheral read-write circuit,including the decoder circuit,the line level conversion circuit,the column level conversion circuit and the sensitive amplifier.After that,the CMOS device is used to build each module,and the internal structure diagram and simulation result diagram of each module are given.After the modules are confirmed to work properly,they are connected together and connected to the 1S1R crossbar array.It can be seen from the read-write simulation of the 1S1R crossbar array that the 1S1R unit can go through a complete read-write process.2.After designing the peripheral read-write circuit of the 1S1R crossbar array,the impact of the selector parameters,including threshold voltage(V_th),selector on resistance(R_s-on),off resistance(R_s-on),nonlinear（NL）on the performance of 1S1R crossbar array is studied.Firstly,in the environment of 1S1R crossbar arrays of different sizes,the size of V_thwas adjusted to observe whether the performance of 1S1R crossbar arrays changed.It is found that the V_thhas a great impact on WM,but a small impact on RM.In addition,if V_this set too high,the minimum read voltage will increase,which will cause misreading phenomenon.Then,according to the RM,WM,P_r,P_w,the size of V_this finally determined.Secondly,the values of R_s-on,R_s-offand NL of the selector are determined by the same method.The results show that R_s-onhas a greater effect on WM,while R_s-offhas a greater effect on RM and P_r,and the larger the NL,the better.However,according to the mathematical formula model and practical significance of NL,NL cannot increase unlimitlessly.Finally,the 1S1R modules with the parameters determined were added to the crossbar array,and compared with the original RRAM crossbar array,the experimental results show that the 1S1R crossbar array reduces the leakage current to a great extent.