The Design And Research Of Novel Read-Write Circuit Based On STT-MRAM

Spin Transfer Torque Random Magnetic Memory(STT-MRAM)is a novel non-volatile memory.It is considered to be one of the most potential replacements for Flash.It has strong application prospects in all walks of life in the future.In the thesis,two main aspects related to STT-MRAM peripheral circuit are discussed and studied,including the read circuit and the write circuit.Firstly,a novel read circuit with dynamic reference and variable tolerance is designed for deep nanometer STT-MRAM,which achieves high sensing margin(SM)and low read interference(RD);Then a novel low-power write circuit is designed,which improves the traditional write operation structure and write operation process and achieves low-power performance.The main design and research content of this article includes the following parts:(1)Firstly,the STT-MTJ which is an important device of STT-MRAM is modeled.Then,the design principle of STT-MRAM read-write circuit is briefly introduced.Finally,the main problems hindering the development of STT-MRAM read-write circuit and the defects of existing design schemes to solve these problems are summarized.(2)A novel read circuit for STT-MRAM is designed,which is mainly improved from the reference cell,bit line voltage and sense amplifier.In the design,for the traditional fixed reference unit,a solution to generate a dynamic reference voltage is proposed,which greatly improves the read sensing margin(SM);for the larger read currents is easy to cause read disturbance(RD),a scheme for generating bit line clamping voltage is proposed to reduce the read disturbance;in view of the influence of PVT changes on the circuit,a new type of sensitive amplifier is proposed to enhance the anti-interference ability of the circuit.(3)A novel write circuit of STT-MRAM is designed,which is mainly improved from the write operation structure and the write operation process.The circuit first designed a hybrid write operation structure for the bidirectional write asymmetric phenomenon of STT-MRAM,which reduced the energy consumption from "1" to "0" by 30%;then,for the traditional write operation process,a write verification circuit with a write operation completion detection circuit and a self-write termination circuit is designed,which can detect the write operation status in real time and adjust the write drive status in time.Compared with the traditional write operation process,it can save 50% of the power consumption.(4)According to the voltage requirement of the novel STT-MRAM read-write circuit proposed in this thesis,a set of power management circuits that meet the requirements are proposed,which is mainly composed of a bandgap reference circuit and an LDO circuit.In this circuit,a bandgap reference circuit with adjustable output voltage is adopted,which can realize a bandgap voltage source below 1V,then a fully integrated LDO circuit is designed based on the reference voltage provided by the bandgap reference circuit,which meets the voltage requirements of the read-write circuit.