Research And Design Of Read And Write Circuit For Spin Transfer Torque Magnetic RAM

Memory is an important part of computer architecture.With the shrinking of the characteristic size of semiconductor process,memory based on traditional process has encountered performance bottleneck.The challenges faced by traditional storage technologies have given rise to new technologies.One of the most commercially promising new types of memory is Spin transfer Torque Magnetic RAM(STT-MRAM).It is considered as an ideal device for building the next generation of non-volatile cache and main memory.Circuit design with high speed,high reliability and low power consumption is crucial for the wide application of STT-MRAM.This paper studies the read and write circuit of STT-MRAM,and completes the design based on SMIC 40 nm 1.1/2.5v process.Firstly,this paper analyzes the working principle of STT-MRAM,and establishes the simulation model by Verilog-A description language according to the device parameters provided by the cooperative institution.Resistance characteristics and asymmetry of switching current are considered.Then,a dual-terminal-self-check write circuit architecture is designed.The self-check structure is used to determine the type of written data.The operation is terminated immediately after the data is successfully written.At the same time,the operation of writing duplicate data is avoided and the power consumption of writing circuit is reduced.The average writing power is 0.106pJ/bit,which is 62.5% less than the traditional writing circuit.The effective writing of '0' and '1' saves 53.4% and 15.8% respectively,and the repeated writing of "0" and "1" saves 94.1% and 83.1% respectively.The valid range for writing '0' and '1' is 393 mV and 274 mV,respectively.Finally,this paper analyzes the effect of reading disturbance on the reliability of the read operation,a Symmetric Dual-reference reading scheme is put forward,which is based on positive and negative feedback connection,and the idea of using the source negative feedback.Sensing margin is 42.2 ~ 59.3 mV for reading '1' and 45.2 ~ 58.3 mV for reading '0'.A combination of preamplifier and renewable comparator is used to compare the output of sensitive amplifier.Reference voltage source is designed to provide bias voltage for comparators.Its power consumption is 0.88 ?W,temperature coefficient s 7.4 ppm/ ?,power regulation is 11.1 ppm/V,power supply rejection ratio is-55.4dB at low frequency.Monte Carlo simulation results of the whole reading circuit show that the maximum reading time and current of reading '1' is 4.3ns and 5.68?A,respectively.the reading time and current of reading '0' is 1ns and 5.49?A,respectively.Read accuracy is 100% verified by Latin hypercube sampling method.