Font Size: a A A

The Read-Out Integrated Circuit System Design For Uncooled Infrared Focal Plane Array Based On Verilog-AMS

Posted on:2013-01-04Degree:MasterType:Thesis
Country:ChinaCandidate:H C TongFull Text:PDF
GTID:2218330371459409Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The Uncooled Infrared Focal Plane Array (UIRFPA), start up since the1970s, has been developed to the third generation, namely "Adroit Focal Plane Array". Relative to the Cooled Infrared Focal Plane Array, because of its small volume, light weight, low cost, and long service life and low consumption, and faster startup as well as good stability, in scientific research, national life and military defense, etc. is in a wide range of applications. In recent years, the scale of the UIRFPA has expanded from640×480to1,024X1,024. Corresponding to the array, the Readout Integrated Circuit (ROIC) design is also experienced some stages. The basic function of ROIC is integrated, amplified and sampling and hold(S/H) and a series of processing the electrical signal that converted from infrared radiation. Finally deserialize and output. At present the main development directions of ROIC are the function of the rich ROIC design; the low power consumption technology in ROIC design; the ROIC circuit design with function of temperature compensation; Background suppression, etc.This paper firstly introduces the principle of infrared focal plane array, classification, application and development at home and abroad, and makes the reader have a simple understanding to infrared focal plane array. Then it introduces application of mixed signal/system design language Verilog-AMS for Top-Down design. Then analysis and divided ROIC system based on the theory of ROIC. Establish of each module of ROIC using Verilog-AMS and then try to analyze the error model and simulation, finally established the ROIC system model.This paper used Cadence AMS tools for the system design of readout integrated circuit for uncooled infrared focal plane array detector, including array size for320X240. This paper introduces the basic principle of the ROIC module design and the process of using Verilog-AMS to realize the design of module and system. And after ideal system simulation, realize the simulation of part of the transistor level module.
Keywords/Search Tags:Verilog-AMS, UIRFPA, ROIC, Top-Down Design
PDF Full Text Request
Related items