Research Key Technologies Of Fast Locking Low Phase Noise Phase-locked Loop Frequency Synthesizer

With the emphasis on Ku band communication circuit equipment and its considerable market value,the Phase-locked loop frequency synthesizer which is as the most important part of the RF front-end determines the performance of wireless communication system.For the sake of information security and channel switching,the lock-in time of PLL is strictly required.Thus,this thesis is to study the Phase-locked loop frequency synthesizer from the aspects of low phase noise and fast locking time.This design starts from the function and significance,summarizes the research status,main classification,advantages and disadvantages of PLL frequency synthesizer.The main performance indexes of the frequency synthesizers,its influence on the system and its generation mechanism are analyzed,the function and the s-domain of each module in the PLL system are described in detail.Based on this,the stability and noise model of the PLL frequency synthesizer system is established to discuss the main source of system noise,the corresponding system transmission function and the mathematical expression of PLL locking time,so the low frequency noise and high frequency noise of the output signal are optimized by increasing the output current of charge pump and reducing the phase noise of VCO.The structure and indexes of design are determined according to the actual use requirements.Then the working principle,irrational factors,specific circuit module composition and design indexes of voltage controlled oscillator(VCO),phase and frequency detector(PFD),charge pump(CP)and frequency divider(1/N)are described in detail.The types of VCO are introduced in detail,the circuit structure and internal module parameters of the improved Class-C VCO are determined.Starting from the irrational factors and the working principle of the charge pump,a new type of charge pump structure combining fixed bias and feedback bias suitable for the design is proposed by improving the traditional charge pump circuit.At the same time,the circuit structure and simulation results of each module are given.Finally,the principle,implementation and characteristics of the prevalent single band fast locking technology are analyzed.The development history of the automatic frequencycalibration technology applied to the wideband Phase-locked loop frequency synthesizer is introduced,the implementation methods and working principles of the widely used frequency calibration technology are also listed.The proposed closed loop frequency calibration technology which is also the innovation of the thesis can greatly reduce the lock-in time on the basis of no more hardware and power consumption.On this basis,a new closed-loop frequency calibration technology is proposed by combining periodic voltage frequency detector and binary search method,which is also the innovation of this design.The proposed closed-loop frequency calibration technology avoids the single frequency band calibration process by shortening the automatic frequency calibration control clock when the periodic voltage frequency detector does not detect the frequency jump,that is,when it is far from the target frequency band,and when it is close to the target frequency band,using the periodic voltage frequency detector to determine the target frequency band.Therefore,on the basis of increasing little hardware and power consumption,it not only greatly shortens the locking time,but also ensures to select the optimal frequency band to complete the final locking process.This fast locking low phase noise PLL frequency synthesizer is implemented in TSMC 65nm 1P9M,power supply voltage is 1.2V,output frequency is from 16.75GHz to 18.1GHz.In the required frequency range,the phase noise at 1MHz frequency offset from the carrier is lower than-108dBc/Hz.When the target frequency is 18GHz,the locking time of having chosen the tuning curve is 11.05 ?s,and the automatic frequency calibration process is about 10.13?s,so the overall locking time of the system is 21.18?s.At this time,the tuning voltage is 0.863V and the fluctuation voltage is within 1mV.