The Monolithically Integrated Multi-mode Cmos Orthogonal Frequency Synthesizer

The rapid growth of wireless communication technology, which has brought a huge convenience to the people's life, has led to many wireless communication standards were published. In order to provide more convenience to the consumers, the research and implementation of multimode wireless communication systems became a new focus of the development on wireless data communication system. As the most important block in the multimode wireless radio frequency (RF) transceiver, frequency synthesizer can provide several clean, stable and programmable local oscillator (LO) signals to RF transceivers that can meet different wireless communication standards. And its performances will determine the whole performances of RF system. In this thesis, the design and implementation of multimode frequency synthesizer for WCDMA, Bluetooth and IEEE 802.11a/b/g standards are studied.First, this thesis describes the non-ideal effect of frequency synthesizer on the performance of wireless communication system. And the design specifications of multimode frequency synthesizer are derived based on the WCDMA, Bluetooth and IEEE 802.11a/b/g standards with theoretic calculations. Then the implementation method of multimode frequency synthesizer is discussed.Second, three popular system structures of frequency synthesizers are studied based on the designs, implementations and test results. A proper structure of frequency synthesizer is selected to implement the high performance and fully integrated multimode frequency synthesizer with quadrature outputs.Third, a system design method with phase margin optimized is introduced and discussed. In order to overcome the shortcoming of this loop design method, a new system level design method is developed. Based on this new method, the affections of loop parameters on the loop performances are studied. And an optimization method for loop parameters design is concluded from this study.Fourth, the quality factor of voltage controlled oscillator (VCO) is calculated with the help of the simple model developed in this thesis. The mainly limitation of improvement on phase noise of wide band VCO with high center frequency is found out from theoretic analysis and calculation. Base on this theory, a phase noise optimized VCO that can meet the standards of Bluetooth and IEEE 802.11a/b/g without increasing the power consumption and die size is designed and implemented in 0.18um RFCMOS process. Measurement results shows that the phase noise of this VCO can achieve about 2.5dB improvement at3 MHz offset from carrier compared to the traditional VCO, which meet the theoretic analysis very well.At last, an integer-N frequency synthesizer for IEEE 802.11b/g and Bluetooth, which is designed and implemented in 0.18um RFCMOS process, is measured. The affection of charge pump on loop characteristics, and the design of a phase switched frequency divider are described and analyzed in detailed. Then, the ability of this frequency synthesizer's function that can be extended to meet IEEE 802.11a standard is discussed. Meanwhile, a fractional-N frequency synthesizer is designed and implemented for WCDMA in 0.18um RFCMOS process.