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For Short-range Device With Frequency Frequency Synthesizer Design, Self-calibration Scores Points

Posted on:2009-03-24Degree:MasterType:Thesis
Country:ChinaCandidate:H J ZhangFull Text:PDF
GTID:2208360272459129Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Short range wireless communication technique has been widely used because of having an inherent advantage in low power for its short range over other wireless communication techniques and occupying the unlicensed Industry Science Medical(ISM) frequency bands.Short range device(SRD) has become an outstanding technique in all sorts of short range wireless communication techniques for its low power and convenience of design.Frequency synthesizer is the key block of SRD transceivers,and this thesis concentrates on the research and design of frequency synthesizers for SRD applications.Firstly,the thesis adopts the most suitable structure of frequency synthesizer for SRD applications after studying the common used ones.Moreover,the thesis analyzes various kinds of performance parameters of the frequency synthesizer and defines the specifications of the frequency synthesizer according to typical SRD standard ETSI EN330 200.Secondly,the thesis analyzes the phase noise of the fractional-N frequency synthesizer and builds up the relationship between loop phase noise and the noise of each block in the loop.In addition,the thesis addresses the effects of the nonlinearity of the PFD and CP to the noise characteristics of sigma delta modulator which provides the theory basis for following circuit design.Thirdly,the thesis summarizes all the reported adaptive frequency calibration(AFC) techniques and proposes a modified calibration technique and the simulation results show that the proposed AFC has overwhelming advantages in terms of speed and power consumption.Finally,the thesis implements a 900MHz S-△Fractional-N frequency synthesizer with AFC for SRD applications.A digital controlled resistor array has been adopted in VCO to save chip area,and a phase selecting prescaler has been used in divider where the source follower has been optimized.Moreover,a 3-bit third order single loop S-△modulator and a PFD with adjustable delay time have been carried out in the design.The synthesizer has been fabricated in typical 0.35-μm CMOS process and the test results meet all the requirements.The thesis also realizes a 433MHz S-△Fractional-N frequency synthesizer with AFC for SRD applications.A low pass filter has been introduced in the current tail of VCO to improve the phase noise.Additionally,the dimensions of transistors used in the first divide by 2 circuit have been carefully designed to accommodate the input signals with a frequency range of 1GHz and a voltage range of 800mV.The synthesizer has been fabricated in typical 0.25-μm CMOS process and the simulation results and the post layout simulation results of VCO show that the performance of the synthesizer can meet all the requirements.
Keywords/Search Tags:Short Range Device (SRD), Adaptive Frequency Calibration (AFC), Factional-N Frequency Synthesizer, Phase Locked Loop (PLL), Phase Noise, Voltage Controlled Oscillator (VCO), Prescaler, S-Δmodulator
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