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Multi-bit-per-stage pipelined architecture analog to digital converter in CMOS

Posted on:2005-09-09Degree:M.SType:Thesis
University:California State University, Long BeachCandidate:Do, VanFull Text:PDF
GTID:2458390008979310Subject:Engineering
Abstract/Summary:
In the past decades, Digital technology has been advanced very fast. Many applications now are digitized and compact. A lot of data once were used to be stored in paper and folder, now they are stored in a compact disc. It saves us lot of area and cost. Digital processing has been improved with speed and cost so more data can be processed fast in minimum space. Analog signal is also taking advantage of digital data processing so it can be stored in small space. In order to do that, many methods of conversion data from analog to digital has been forming. Depending on application's specification, so which method can be chose and used.; This work addresses the designing of multi bit per stage pipeline Analog to Digital converter which found now very popular in the market by the mean of looking into the portfolio of many dominant Analog mixed signal integrated circuit companies such as Analog Device INC, Texas Instrument INC, Cirrus Logic, National Semiconductor, and Maxim IC. Top level simulation was used with the latest tooling which present industry using. Block level design and analysis will be included. Demonstration is a block of 3 bits per stage, those can be cascaded together to increase the number of bits for the whole converter. Components were designed with 0.180um generic CMOS process given by CECS department California State University, Long Beach.
Keywords/Search Tags:Digital, Analog, Converter
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