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A programmable memory built-in self-test for SRAM

Posted on:2011-01-31Degree:M.SType:Thesis
University:Texas A&M University - KingsvilleCandidate:Chinthala, Nishanth ReddyFull Text:PDF
GTID:2448390002967240Subject:Engineering
Abstract/Summary:
In development of modern System on Chip's (SoC's), the testing of the embedded memories is becoming an important issue. These embedded memories may have large number of defects which are complex and diverse and may not be detected during fabrication test. Also, as there are limited I/O pins it is not feasible to test the memory cores externally. To test such embedded memories, Built-in Self Test (BIST) approach is implemented which detects wide variety of functional faults. The programmable BIST offers flexibility to achieve low area overhead and cost effective. In this work, an embedded SRAM is tested by using march algorithms in the BIST architecture to detect various faults in the memory.
Keywords/Search Tags:Test, Memory, Embedded, BIST
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