Asynchronous analog to digital converters: Architectures and circuits

The thesis presents novel architectures for asynchronous analog to digital converters (ADCs) with a focus on sensing applications. The asynchronous sampling scheme provides a low power, clockless data acquisition approach that offers significant power savings and enjoys the benefits of high speed in scaled deep submicron technologies. Two different architectures and circuit implementations have been proposed.In the first project, we demonstrate a novel variable input-feature correlated asynchronous sampling and digitization approach for source compression and direct feature extraction from physiological signals. The adaptive asynchronous sampling scheme proposed adjusts the resolution of the built-in quantizer based on the slope of the input signal for direct data compression. This technique is further expanded to enable direct detection of the critical points in the input waveform by tracking the overall profile/features of the waveform such as peaks, troughs, amplitude and delay. We term this approach "an input-feature correlated asynchronous analog to information (A2I) conversion", where critical information from the signal can be extracted at the sensor output directly from the samples generated with no overhead on transmission and processing requirements. The A2I converter is suitable for long-term wearable monitoring of physiological signals for biomedical applications. We show representative case studies on QRS detection in ECG signals utilizing the proposed A2I converter to prove the functionality of the design. Simulation results show large compression in the sampled output and 98% efficiency in the detection of the Q, R and S waves for complicated ECG waveforms, all with extremely low power and storage requirements.The second project involves the design of a current-mode asynchronous delta-sigma modulator for pixel-level A/D conversion in image sensing applications. The amplitude of the input photo-current is time encoded into the edge transitions of the pulse-width modulated output digital signal. We have implemented a 2-bit thermometer coded feedback current mode digital to analog converter (DAC), whose peak reference current can be tuned based on the average intensity of the incident light. This helps us realize adaptive dynamic range setting for the image sensor. A 32X32 pixel image sensor, with a pixel area of 24X31.7 mum 2 and 19.44% fill factor, has been designed in the IBM 65 nm CMOS process to prove the functionality of the design. Initial circuit level simulation results from the cadence environment show feasibility for low power, high resolution pixel level data acquisition.